Topic: kcpsm3.vhd with new ise parser

I activated new parser to be able to synth the IEEE_Proposed package, now i got following error in kcpsm3.vhd

ERROR:Xst:3154 - "/home/nios/Desktop/FPGA_ARCADE/GIT/FpgaArcade64/build/kcpsm3.vhd". Line 333. Unable to set attribute "INIT" with value "0080" on instance <int_pulse_lut> of block <LUT4>. This property is already defined with value "0000" on the block definition by a VHDL generic or a Verilog parameter. Apply the desired value by overriding the default VHDL generic or Verilog parameter. Using an attribute is not allowed.

  int_pulse_lut: LUT4
  --synthesis translate_off
    generic map (INIT => X"0080")
  --synthesis translate_on

has to be with synth off/on, when i remove it works, anyone an idea how to correctly fix it?


new parser can be enabled with
-use_new_parser yes
in replay.scr

anyone an idea of other disadvantages of the new parser?

According to http://earlz.net/view/2012/09/08/1526/u … hdl-on-old with it enabled you should get better error messages

Re: kcpsm3.vhd with new ise parser

what version of ISE are you using? I can take a look.

attribute INIT of int_pulse_lut         : label is "0080";

...

  int_pulse_lut: LUT4
  --synthesis translate_off
    generic map (INIT => X"0080")
  --synthesis translate_on
  port map( I0 => t_state,
            I1 => clean_int,
            I2 => int_enable,
            I3 => active_interrupt,
             O => int_pulse );


The generic is used only for simulation, the attribute for synthesis.  Ideally the generic only would be used, but the tools did not support it correctly.

value "0000" is wrong though, it should be "0080"
also, synthesis should not see the generic map statement, I wonder why it's ignoring the --systhesis translate pragma?