Hello, sorry I missed this (the git case was closed).
It looks like a problem with the active converter. I'll have a play with loader and see if I can reproduce it.

2

(0 replies, posted in DE-Nano)

Please use this forum for discussion specific to the Terasic DE10-Nano platform.
/MikeJ

3

(0 replies, posted in Arduino Vidor4000)

Please use this forum for discussion specific to the Vidor4000 platform.
/MikeJ

4

(5 replies, posted in C64)

haha wow that is an oldie !

5

(94 replies, posted in C64)

It something I keep meaning to go back to. We have improved the RTL to match the schematics a little better, and we have a lot of extracted layout data now to work with.

The issue is still how to model the analogue bits sufficiently well in an FPGA.

6

(5 replies, posted in C64)

Ah excellent. I'll take a look and reach out to them when time permits. Thanks.

7

(7 replies, posted in Plus/4)

Hi Istvan and welcome. Looks great.
I've looked at the TED schematics for years but never found the time or enthusiasm to work on it.
I would love to include your core in our ecosystem if that's ok.
btw you are more than welcome to join us on the slack group.

8

(5 replies, posted in C64)

yes I've been following it for a while, looks cool.
It's not clear to me if they encourage other platforms to run their core? It will certainly run on Replay2.

9

(44 replies, posted in News)

done

10

(44 replies, posted in News)

Sure!

11

(44 replies, posted in News)

Sure, sent you a PM

12

(2 replies, posted in News)

Hiya. The discussion is on slack, ping me and come along if you wish.
Going well, I've got samples for the Xilinx ultrascale part now and I'm finalizing layout.
Some website updates coming soon with the spec....

I was hoping to get the board out to manufacture by now, but life is a bit complex at the moment.

Hiya and welcome.
The code I wrote is fairly close to the original but not enough to directly interface with the other chips I'm afraid.
Sorry sad

14

(44 replies, posted in News)

ahha, of course.

15

(5 replies, posted in Amiga)

It would be a lot easier if you poked us on slack! Email me!

16

(0 replies, posted in Amiga)

While I remember, I have some atx real panels suitable for the 060DB.
Ping me if you want one.
Cheers,
MikeJ

17

(0 replies, posted in News)

Seemed to be a stuck activation queue again, fixed it!
/MikeJ

18

(5 replies, posted in Amiga)

Hiya. You are getting the cores from the new release area, good.
I can't see the image you post sad
p.s. come join us on slack! https://www.fpgaarcade.com/kb/forum-and-chat-support/

Thanks!

20

(4 replies, posted in Amiga)

Potentially faster yes, although we have an option to slow things down.
I'll send you a slack link as well if you want to discuss interactively.
Cheers,
Mike

21

(44 replies, posted in News)

oops just saw this!
I'll email you.

22

(2 replies, posted in General discussion)

Replay2 will prototype this year. Preparing some announcements. It's very exciting but it's involved a lot of negotiations in the background.

23

(1 replies, posted in News)

Hi!
Forum is back up, more for archive than anything else.

You may find your username has been deleted as part of the hack cleanup, if so feel free to re-register.
/MikeJ

24

(1 replies, posted in General discussion)

yes it has - well it's archived. We've got you on slack now, but for everybody else we have a private git repos and are moving to public releases.
For now
https://github.com/FPGAArcade/replay_release

25

(100 replies, posted in Expansion cards)

oh crap you need to be on slack and have access to the git repository.
Moving public as fast as possible
You need to run a different core. Email me!