1

(317 replies, posted in News)

sounds great, please tell when you launched it

@mike: could you put me on list for daughterboard with 68060 for europe?

2

(3 replies, posted in News)

happy xmas!

let 2017 be the year of cores & hw

yours,
manuel

I activated new parser to be able to synth the IEEE_Proposed package, now i got following error in kcpsm3.vhd

ERROR:Xst:3154 - "/home/nios/Desktop/FPGA_ARCADE/GIT/FpgaArcade64/build/kcpsm3.vhd". Line 333. Unable to set attribute "INIT" with value "0080" on instance <int_pulse_lut> of block <LUT4>. This property is already defined with value "0000" on the block definition by a VHDL generic or a Verilog parameter. Apply the desired value by overriding the default VHDL generic or Verilog parameter. Using an attribute is not allowed.

  int_pulse_lut: LUT4
  --synthesis translate_off
    generic map (INIT => X"0080")
  --synthesis translate_on

has to be with synth off/on, when i remove it works, anyone an idea how to correctly fix it?


new parser can be enabled with
-use_new_parser yes
in replay.scr

anyone an idea of other disadvantages of the new parser?

According to http://earlz.net/view/2012/09/08/1526/u … hdl-on-old with it enabled you should get better error messages

4

(2 replies, posted in C64)

Found this:

http://www.aholme.co.uk/6502/Main.htm

would be interesting how it works in comparision to the T65 core.

source is under:
http://www.aholme.co.uk/6502/

5

(22 replies, posted in FAQ and How-to guides)

thanks a lot - worked, did commit the script if someone would like to build it under linux

6

(22 replies, posted in FAQ and How-to guides)

that makes totally sense, sorry wasn't aware of that
will try it on evening

7

(22 replies, posted in FAQ and How-to guides)

thanks to be so patient with me ..

if it is working i will check in the build.sh and the adjusted prj file.

i tested it now with 3 vga monitors and got invalid format and 2 times out of range ):

you can download bit file under:
http://sandbox64.at/pacman.bit

edit: do you have a ready bit file for me? or can you mail it to me, maybe only my monitors sucks

8

(22 replies, posted in FAQ and How-to guides)

as far as i remember i tried dvi with dvi to hdmi cable  and vga with a dvi to vga adapter
had on both no signal (c64 core works properly from sd card and delivers on both a video signal)

9

(22 replies, posted in FAQ and How-to guides)

tried intern svn

adjusted build script:
https://etherpad.servus.at/p/pacman_script


LOG:
https://etherpad.servus.at/p/pacman_build

found one issue, prj didn't compile some files, because it was written for worlds most hated os where files gets handled case-insensitive

but still black screen ):

when i flash the bit file to fpga, i should see something on the dvi/hdmi output or?

or do i have to be aware of arm settings?

10

(22 replies, posted in FAQ and How-to guides)

does the pacman core the build.bat file work for you? with the dev svn?

for me it doesn't copy ngc file and ngbuild complains then

yours,
manuel

11

(22 replies, posted in FAQ and How-to guides)

thanks for fast response, i used internal svn, both of you develop under windows or?
still have a windows on second partition but would like to avoid to start it if possible.

So i have to convert the bat file to a shell script and start it,
I am newbie to xilinx, used to altera - quartus with gui (also there is a command line tool also)

will try to build/synth pacman and flash it via jtag today evening

12

(22 replies, posted in FAQ and How-to guides)

Found out sadly, that the commodore core is not gpl as i assumed, whats the reason behind this?

really liked the idea of full open cores on replay

13

(22 replies, posted in FAQ and How-to guides)

hi,

thanks a lot for the detailed explanation, I installed old ise now (14.7), did only found one project file for vic20 (*.ise), were it can not find 39 files from the project. How do you start synthese of projects? do i have create a new ise project or is there another project file?

yours,
manuel

damn, sorry i did read it only now, was you there? I wasn't, had collision with other termin which could have been easily moved. Are you planning to go at CTG the meeting this month at 29.10?

yours,
manuel

15

(317 replies, posted in News)

interesting, how does it work all pins to fpga with a softcore? or is there a own arm mcu on it?

ethernet? which phy and mac? which driver, have you write one or using on from linux? are you running linux on it or use the lwip stack?

if you had an arm with sdio i should be able to adjust sdio driver to get mlan 8782 wireless modul running with lwip stack which can station and accesspoint mode.

yours,
manuel

16

(317 replies, posted in News)

Is there already a spec about the adapter board? I assume i will be interested too.

got following error under linux with public repo:

cp: der Aufruf von stat für '../../loader/cs/*.ngc' ist nicht möglich: Datei oder Verzeichnis nicht gefunden
cp: der Aufruf von stat für '../source/core/c1541/*.vhd' ist nicht möglich: Datei oder Verzeichnis nicht gefunden
cp: der Aufruf von stat für '../source/core/c1541/*.v' ist nicht möglich: Datei oder Verzeichnis nicht gefunden
cp: der Aufruf von stat für '../source/core/c64/*.v' ist nicht möglich: Datei oder Verzeichnis nicht gefunden
cp: der Aufruf von stat für '../source/core//*.v' ist nicht möglich: Datei oder Verzeichnis nicht gefunden
cp: der Aufruf von stat für '../source/*.edf' ist nicht möglich: Datei oder Verzeichnis nicht gefunden
cp: der Aufruf von stat für '../cs/*.edn' ist nicht möglich: Datei oder Verzeichnis nicht gefunden
cp: der Aufruf von stat für '../cs/*.ngc' ist nicht möglich: Datei oder Verzeichnis nicht gefunden

assume it works on dev repo?
didn't find edn file in public repo, sorry if i bother you with this question. (will try it on dev repo tomorrow when i got access)

yours,
manuel

18

(22 replies, posted in FAQ and How-to guides)

i am new so dont take infos as 100% true
got schematic per mail, is there a reason why its not public? or wasn't i only able to find it.

1 RS232
-------------
1) with JP1 you can jump the TX from the RS232 if you want it from the ARM or from the FPGA.
2) the arm gives you debug infos at booting
3) with 115200 baud.

2 JTAG
------------
1) sadly the arm jtag pins are grounded. at debuging i am very dependent  on jtag, but if there are no troubles hopefully there is no need for it. so its only for the fpga
2) debuging is not possible )=, except printf via serial
3) puh i am a linux user, had more less only install arm toolchain and call make ( can help if would like to try it under linux, created thread for it http://www.fpgaarcade.com/punbb/viewtopic.php?id=1142)

4 JTAG
-----------
4.1 the expansion connector?
4.2 with xilinx program calbe? http://www.xilinx.com/products/boards-a … -ii-g.html you should get maybe a cheaper (clone maybe) at aliexpress

for the other points i dont have answer yet.. hope i can tell you soon more

19

(6 replies, posted in ARM software)

used the public svn, dont have access to the dev.

didn't find the folder rAppFlashUpdater, is it in the dev svn only?

yours,
Manuel

20

(6 replies, posted in ARM software)

Under ./sw/ i have only the folder arm_sw

I added in every file

#ifndef WIN32
    #define stricmp strcasecmp
    #define strnicmp strncasecmp
#endif

and it builds through (via make) didn't test it yet, should i check in?

also compile.sh and compile.bat are different i think, compile.sh doesn't work for me:
it dont finds the folders /Replay_Apps/rAppFlashUpdater/sdcard/ after creating it is still rApp_template.ini missing which i didn't find in the repo.

21

(6 replies, posted in ARM software)

tried to build it under linux got following error sometimes:

filesel.c:494: undefined reference to `strnicmp'

strnicmp is only available under windows, shouldn't be the code platfrom independent?

yours,
manuel

thanks for help, found out a strange board behavior.

My cheap power supply had written 5V on it but deliviers with no load 5,4V

When i power my replay with it i always get a timeout, if i power it with my labor power supply, also with 5,4V i got the same timeout form the TWI from the ths7353 chip.

If i power it with 5,2 or 5V the board boots up normally.

Would be interesting if someone had / have same strange behavior. (but please dont try it you could damage your board)

Yours,
Manuel

Thanks, i found it also finally out.

Was a solder issue with the THS7353. Soldered a new into, still didn't work. Measured everything on chip (contatct to SCL and SDA, GND, and 5V Voltage) so i assumed everything okay.

Thanks to mikes advice i resoldered all pins than it started working (=

Also current did jump form 0.2A(when it was now working) to 0.3A at start to 0.5A after booting.

Yours,
Manuel

does it work now? what was the issue?

got same error log

managed now serial to get working

got first ini filed not found

DBG: [main.c:140]
DBG: [main.c:141] == FPGAArcade Replay Board ==
DBG: [main.c:142] Mike Johnson & Wolfgang Scherr
DBG: [main.c:143]
WARN: NON-RELEASED BETA VERSION
DBG: [main.c:145]
DBG: [main.c:146] ARM Firmware: 20160407_444
DBG: [main.c:147]
DBG: [main.c:149] Built upon work by Dennis van Weeren & Jakub Bednarski
INFO: Using FullFAT-2.0.1 by James Walmsley
DBG: [main.c:151]
INFO: SDCARD: FAT16 formatted
INFO: SDCARD: 512B/2kB/19MB
ERR:  INI file not found
ERR:  TWI:Rx timeout.
ERR:  TWI:Rx timeout.
ERR:  TWI:Rx timeout.
...

now i got only this:

DBG: [main.c:140]
DBG: [main.c:141] == FPGAArcade Replay Board ==
DBG: [main.c:142] Mike Johnson & Wolfgang Scherr
DBG: [main.c:143]
WARN: NON-RELEASED BETA VERSION
DBG: [main.c:145]
DBG: [main.c:146] ARM Firmware: 20160407_444
DBG: [main.c:147]
DBG: [main.c:149] Built upon work by Dennis van Weeren & Jakub Bednarski
INFO: Using FullFAT-2.0.1 by James Walmsley
DBG: [main.c:151]
ERR:  TWI:Rx timeout.
ERR:  TWI:Rx timeout.
ERR:  TWI:Rx timeout.


i assume TWI is two wire interface aka i2c? what is connected to it?