Topic: Cycle exact TED chip
Has anyone seen this?
https://hackaday.io/project/11460-fpgated
Looks like it could be quite useful?
-(e)
- sweetlilmre
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Re: Cycle exact TED chip
For sure, if he releases it as open source, and gives us permission, it will be fun to run up.
Re: Cycle exact TED chip
iirc there is already a port to MiST - so the source must be around somewhere 
- sweetlilmre
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Re: Cycle exact TED chip
Sources here: https://mist-fpga.net/viewtopic.php?f=17&t=198
Looks like GPL
Re: Cycle exact TED chip
Thanks. GPL3 so compatible with our core lib.
I've created a folder and checked in the ted.v file. It will be pretty simple to get it up and running with the Replay DRAM and support libs.
(I'm working on Scramble/Frogger on my night off this week though)
- sweetlilmre
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Re: Cycle exact TED chip
Awesome. Hopefully a new machine soon :-)
Re: Cycle exact TED chip
Hi,
As the author of the core I recommend to check out the link at https://github.com/ishe/plus4
I know that Mist has adapted my core but they have modified the memory write cycle timing so their version is not cycle exact. On the above link my plus4 implementation has a much better sdram driver with address extension capabilities. I recommend to use this!
Also the plus4 code uses the onboard SPI flash for storing ROM images.
The MiSt team has done however some useful bugfixing which I also recommend to check in the source code (the ones I have verified I have already integrated to the core).
Re: Cycle exact TED chip
Hi Istvan and welcome. Looks great.
I've looked at the TED schematics for years but never found the time or enthusiasm to work on it.
I would love to include your core in our ecosystem if that's ok.
btw you are more than welcome to join us on the slack group.